High-Speed PCB Design and VNA Testing

Brian Walker

Senior RF Engineer SME
Copper Mountain Technologies

Amit Bahl

CRO
Sierra Circuits

When designing PCBs with operating frequencies beyond 10 GHz, you’ll often encounter challenges such as signal reflections, crosstalk, propagation delay, and EMI. These issues might degrade the S/N ratio and attenuate the transmitted signal. If left unchecked, the signal’s fidelity decreases over time, and the entire system might crash.

In this high-speed PCB webinar, you will learn the key design challenges and techniques to tackle them.

Overcoming signal integrity challenges in high-speed PCB designs

The choice of materials directly impacts the signal integrity of your high-frequency designs. Select laminates with a low dielectric constant (D_k < 4) and a low dissipation factor (D_f < 0.005) to minimize insertion loss. In addition, use materials with high thermal conductivity ( k > 0.5 W/mK) for effective heat dissipation.

The stack-up design is another key aspect of high-speed circuit boards. Avoid placing two adjacent signal layers, as this can cause unwanted noise and signal coupling. Preferably, position signal layers one-dielectric away from their reference planes for better noise suppression.

Achieving consistent impedance is essential in high-speed traces. Abrupt changes in line impedance might cause signal reflections and ringing. To prevent these issues, incorporate termination resistors at the transmitter and receiver ends. You can also implement stitching capacitors when routing signals over multiple reference planes.

Another challenge with high-speed circuit boards is ensuring EMC. To block unwanted EM radiation, employ a Faraday cage around sensitive circuits. You can also implement via stitching along the ground plane or critical traces to provide multiple low-impedance return paths.

To reduce crosstalk, you must provide adequate spacing between adjacent signals—ideally 3 to 5 times the trace width. Additionally, incorporate guard traces next to high-frequency lines and avoid parallel routing of sensitive signals (clock lines and data buses) on adjacent layers.

When data and clock signals do not arrive at the receiver simultaneously, it might cause propagation delay and signal sampling errors. To avert the skews, you need to match track lengths using meandering.

In addition to the above, power supply noise is another important factor in high-frequency designs. To filter out high-frequency noise and provide a stable voltage supply, incorporate multiple low-inductance decoupling capacitors and position them as close as possible to the IC power pins.

For seamless production of your high-frequency PCBs, you must follow DFM guidelines. Provide at least 8-mil drill-to-copper clearance to avoid electrical shorts. Additionally, have at least 4 mil solder mask web for green/red and 5 mil for other colors to prevent solder bridging.

Webinar agenda:

• Common challenges in designing high-speed PCBs
• Choosing materials and designing efficient stack-ups
• Techniques to maintain signal and power integrity
◦ Design strategies to achieve controlled impedance
◦ Termination techniques to reduce signal reflections
◦ Shielding methods to ensure EMC
◦ Ways to avoid crosstalk and propagation delay
◦ Effective decoupling strategies to reduce PDN noise
• Best practices for designing RF PCB layouts
• DFM tips for high-speed boards
• VNA testing for high-speed circuits
◦ S-parameter measurement
◦ Return loss and reflection coefficient analysis
• Time-domain vs. frequency-domain analysis with vector network analyzer

Meet the speakers

Brian Walker, Senior RF Engineer SME at Copper Mountain Technologies

Brian Walker is the Senior RF Engineer SME at Copper Mountain Technologies where he helps customers to resolve technical issues and works to develop new solutions for applications of VNAs in test and measurement. Previously, he was the Manager of RF design at Bird Electronics, where he managed a team of RF Designers and designed new and innovative products. Prior to that he worked for Motorola Component Products Group and was responsible for the design of ceramic comb-line filters for communications devices. Brian graduated from the University of New Mexico, has over 40 years of RF Design experience, and has authored 3 U.S. Patents.

Amit Bahl, CRO at Sierra Circuits

Amit Bahl, widely recognized as the PCB Guy, currently serves as the Chief Revenue Officer at Sierra Circuits. He earned his Bachelor of Science in Engineering from UCLA in 1997, launching his career in Silicon Valley’s tech industry. In 2009, he assumed the role of Director of Sales and Marketing at Sierra Circuits, with a dedicated focus on democratizing design for manufacturing best practices and guidelines for PCB designers and engineers.

Assuming the position of Chief Revenue Officer since 2022, Amit’s mission persists: to simplify the PCB design journey for all stakeholders. His unwavering dedication continues to drive Sierra Circuits as a trusted resource for the PCB design community.